1. Field of the Invention
The present invention relates in general to the field of electronics and lighting, and more specifically to a system and method related to controlling an active light emitting diode current using a multiple mode dimming strategy.
2. Description of the Related Art
Commercially practical incandescent light bulbs have been available for over 100 years. However, other light sources show promise as commercially viable alternatives to the incandescent light bulb. LEDs are becoming particularly attractive as main stream light sources in part because of energy savings through high efficiency light output and environmental incentives such as the reduction of mercury.
LEDs are semiconductor devices and are driven by direct current. The lumen output intensity (i.e. brightness) of the LED approximately varies in direct proportion to the current flowing through the LED. Thus, increasing current supplied to an LED increases the intensity of the LED and decreasing current supplied to the LED dims the LED, i.e. decreases the brightness of the LED. Current can be modified by either directly reducing the direct current level to the white LEDs or by reducing the average current through duty cycle modulation.
Dimming a light source saves energy when operating a light source and also allows a user to adjust the intensity of the light source to a desired level. Many facilities, such as homes and buildings, include light source dimming circuits (referred to herein as “dimmers”).
FIG. 1 depicts an LED lighting system 100 that supplies power to light emitting diodes (LEDs) 102 and dims the LEDs 102 in accordance with a dimming level indicated by the phase modulated signal VΦ. The voltage source 104 supplies an alternating current (AC) input voltage VIN. The dimmer 106 is, for example, a phase cut dimmer that generates phase delays in the input voltage VIN to generate a phase modulated input signal. Full, diode bridge rectifier 108 rectifies the input voltage VIN to generate the phase modulated signal VΦ. The voltage source 104 is, for example, a public utility, and the input voltage VDIM is, for example, a 60 Hz/120 V voltage in the United States of America or a 50 Hz/230 V voltage in Europe. The phase delays indicate dimming levels. Generally, as the phase delays increase, the dimming level decreases, i.e. as the phase delays increase, the dimming level indicates a lower brightness level for LEDs 102. The Background sections of Melanson I, Melanson II, and Melanson III, describe examples of dimmer 106.
Switching power supply 110 utilizes switching power converter technology to convert the phase modulated signal VΦ into an output voltage VOUT. The output voltage VOUT is sufficient to bias the LEDs 102. Switching power supply 110 also supplies an LED current iLED to illuminate the LEDs 102.
Current controller 112 controls active and average values of LED current iLED by controlling the conductivity of n-channel field effect transistor (FET) Q1. Current controller 112 generates a gate control signal CG0 to charge and discharge a gate of FET Q1. The control signal CG0 has two relevant frequencies, an active frequency and a duty cycle modulated frequency. During an active period of LED current iLED, the control signal CG0 has an active frequency in the range of, for example, 20 kHz to 500 kHz. As described subsequently in more detail, the duty cycle modulated frequency is less than the active frequency. The active period of LED current iLED is the period of time when the average value of LED current iLED equals iFULL. The time period for this average is, for example, one or a few (such as 3-5) periods of the active frequency.
When the control signal CG0 is a logical “one”, FET Q1 conducts, i.e. is “ON”, and when the control signal CG0 is a logical “zero”, FET Q1 is nonconductive, i.e. is “OFF”. When the FET Q1 is “ON”, diode D1 is reversed bias and, LED current iLED flows through the LEDs 102 and charges inductor L1. When FET Q1 is “OFF”, the voltage across inductor L1 changes polarity, and diode D1 creates a current path for the LED current iLED. The inductor L1 is chosen so as to store enough energy to maintain an approximately constant active value of LED current iLED when MOSFET Q1 is “OFF”. Capacitor C1 helps “smooth” LED current iLED. As subsequently explained in more detail, the active value of the LED current iLED is the average LED current iLED when the current control system 112 is active, i.e. during the active period of LED current iLED. The LED current iLED includes a ripple 201 due to, for example, the charging and discharging of inductor L1. The frequency of the ripple 201 is the active frequency. It is desirable, for LED efficiency, to keep the LED current relatively constant, to reduce heating effects.
FIG. 2 depicts a graphical representation 200 of the LED current iLED for various dimming levels indicated by the phase modulated signal VΦ. Referring to FIGS. 1 and 2, when the phase modulated signal VΦ indicates a full dimming level, i.e. full brightness for LEDs 102, current controller 112 controls the LED current iLED so that the active value of LED current iLED is continuous and constant over time and equals iFULL, as indicated by LED current iLED waveform 202. “iFULL” represents the active value of LED current iLED that causes the LEDs 102 to illuminate at full brightness.
The current controller 112 uses feedback information from feedback signal LEDisense to sense the active value of LED current iLED. The feedback signal LEDisense represents a voltage Vfb across sense resistor RSENSE. The voltage Vfb represents LED current iLED when FET Q1 is ON. Thus, from the feedback signal LEDisense, the current controller 112 obtains the value of LED current iLED and can adjust the duty cycle of control signal CG0—FULL to maintain the active value of LED current iLED at the full active value iFULL during the active period of LED current iLED. As subsequently explained in more detail, the control signal CG0—FULL is also duty cycle modulated at the duty cycle modulation frequency in response to dimming levels indicated by phase modulated signal VΦ to generate control signal CG0.
To determine the dimming level indicated by phase modulated signal VΦ, comparator 114 compares the phase modulated signal VΦ with a phase delay detection reference signal VDET. The value of phase delay detection reference signal VDET is set to detect an edge of any phase delays in the phase modulated signal VΦ. Generally, the edge of any phase delays during each cycle of phase modulated signal VΦ results in a voltage increase in phase modulated signal VΦ. Thus, generally, the value of phase delay detection reference signal VDET is set low enough, so that the output of comparator 114 changes from a logical 0 to a logical 1 when a rising edge associated with an end to a phase delay is detected and changes to a logical 0 if a phase delay is detected during a cycle of phase modulated signal VΦ.
Comparator 114 generates a duty cycle modulated enable signal EN at the duty cycle modulation frequency. The duty cycle of enable signal EN corresponds to the dimming level indicated by phase modulated signal VΦ. The current controller 112 responds to the enable signal EN by duty cycle modulating the control signal CG0 so that the average value, iLED—AVG, of LED current iLED varies in accordance with dimming levels indicated by the phase modulated signal VΦ. Modulator 116 represents a logical representation of utilizing the enable signal EN to generate a duty cycle modulated control signal CG0. The enable signal EN represents one input signal to AND gate 118, and control signal CG0—FULL represents another input signal to AND gate 118. The AND gate 118 is exemplary. In typical applications, the function of the AND gate 118 is integrated into the logic of the controller 112. Control signal CG0—FULL corresponds to control signal CG0 during the active period of LED current iLED. When the enable signal EN is a logical 1, the control signal CG0 equals the control signal CG0—FULL. When the enable signal EN is a logical 0, the control signal CG0 equals 0. Thus, the control signal CG0 is duty cycle modulated to generate the control signal CG0—FULL and is duty cycle modulated in response to the phase modulated signal VΦ.
For example, referring to LED current iLED waveform 204, when the phase modulated signal VΦ indicates a ¾ dimming level, the duty cycle of enable signal EN is 0.75. The enable signal EN causes the current controller 112 to duty cycle modulate the control signal CG0 with the same duty cycle as enable signal EN so that time period TACTIVE—3/4/T equals 0.75. Thus, the active period of LED current iLED equals TACTIVE—3/4 for each period T of phase modulated signal VΦ while the phase modulated signal VΦ indicates a ¾ dimming level. Period T represents a duty cycle modulated period, and the duty cycle modulated frequency equals 1/T. The average LED current iLED—AVG equals iFULL (the active value of LED current iLED) times the duty cycle of enable signal EN. For a ¾ dimming level, the average LED current iLED—AVG equals 0.75·iFULL. During the inactive period of LED current iLED, i.e. between the end of the active period TACTIVE—3/4 and the beginning of the next period of phase modulated signal VΦ, the LED current iLED is zero.
Referring to LED current iLED waveform 206, when the phase modulated signal VΦ indicates a ⅛ dimming level, the duty cycle of enable signal EN is 0.125. The enable signal EN causes the current controller 112 to duty cycle modulate the control signal CG0 with the same duty cycle as enable signal EN so that time period TACTIVE—1/8/T equals 0.125. Thus, the active period of LED current iLED equals TACTIVE—1/8 for each period T of phase modulated signal VΦ while the phase modulated signal VΦ indicates a ⅛ dimming level. The average LED current iLED—AVG equals iFULL times the duty cycle of enable signal EN. For a ⅛ dimming level, the average LED current iLED—AVG equals 0.125·iFULL. During the inactive period of LED current iLED, i.e. between the end of the active period TACTIVE—1/8 and the beginning of the next period of phase modulated signal VΦ, the LED current iLED is zero.
FIG. 3 depicts a graphical relationship 300 between each dimming level indicated by phase modulated signal VΦ and the LED current iLED, the enable signal EN, and the average value of LED current iLED, iLED—AVG. The current controller 112 maintains the active value of LED current iLED at iFULL for all dimming levels. The duty cycle of the enable signal EN varies from 0 to 1.0 as the dimming level varies from 0, i.e. LEDs 102 OFF, to full intensity, i.e. LEDs 102 at full brightness. By modulating the LED current iLED in accordance with the enable signal EN, the LED average current iLED—AVG varies as the dimming level varies.
During inactive periods of LED current iLED, the LEDs 102 can noticeably flicker, especially at lower dimming levels when the LED current iLED is inactive for longer periods of time during each period of phase modulated signal VΦ. Additionally, the high active value iFULL of LED current iLED causes inductor L1 to generate more noise and heat during the active period relative to a lower value of LED current iLED. Furthermore, generally, LED lighting system 100 operates less efficiently with higher values of active current value of LED current iLED. Additionally, dimming the LEDs 102 as described with reference to FIGS. 1-3 can cause color variations in the output light of the LEDs 102.